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Electronic system-level design and verification
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#	Item
21	Digital Design Derivation 1. Introduction This research applies formal methods in logic, verification, and synthesis to digital design engineering. The work centers on the use of applicative notation for system descript Add to Reading List Source URL: www.cs.indiana.edu Language: English - Date: 2001-09-19 15:58:20 Logic in computer science Digital electronics Logic synthesis Logic simulation High-level synthesis Verilog Actor model Abstraction Programming language Electronic engineering Electronic design automation Electronic design
22	SANKHYA™ Teraptor™ Designer Add to Reading List Source URL: www.sankhya.com Language: English - Date: 2013-11-04 16:37:49 Design Electronic system-level design and verification Consumer electronics Prototype Embedded system Computer-aided design Systems design ATI Technologies Electronic design automation Technology Electronic engineering
23	Литература, предлагаемая студентам направления «Встроенные вычислительные системы» Проектирование встроенных систем Add to Reading List Source URL: embedded.ifmo.ru Language: English - Date: 2012-01-27 10:43:09 Reconfigurable computing Embedded system Field-programmable gate array Electronic system-level design and verification Model-based design System on a chip Electronic engineering Nikil Dutt Year of birth missing
24	Designing, Verifying and Building an Advanced L2 Cache Sub-‐System using SystemC Designing, Verifying and Building an Advanced L2 Cache S Add to Reading List Source URL: events.dvcon.org Language: English - Date: 2012-02-07 19:56:23 Hardware verification languages SystemC E VHDL High-level synthesis CPU cache Forte Design Systems System on a chip Field-programmable gate array Electronic engineering Electronic design automation Hardware description languages
25	PDF Document Add to Reading List Source URL: www.cs.teiher.gr Language: English - Date: 2012-08-16 13:49:13 SystemC Transaction-level modeling Electronic design Electronic system-level design and verification High-level synthesis Field-programmable gate array System on a chip Modeling language Verilog Electronic engineering Electronic design automation Hardware description languages